1. Field of the Invention
The present invention relates to a liquid crystal display panel, and particularly to a liquid crystal display panel of a Fringe Field Switching (FFS) mode-liquid crystal display apparatus.
2. Description of the Background Art
As the displaying system of liquid crystal display apparatuses, the TN (Twisted Nematic) mode has been widely employed. However, in recent years, what is coming into use is the horizontal electric field system, in which voltage is applied between the pixel electrode and the opposite electrode to generate an electric field being substantially parallel to the panel, such that the liquid crystal molecules are driven in the horizontal direction. The horizontal electric field system is advantageous in widening the viewing angle. In keeping with the recent trend where high displaying quality is required for every field of view, the horizontal electric field scheme is increasingly used in place of the TN mode.
What are known as the horizontal electric field system are the in-plane switching mode and the FFS mode. Particularly, the FFS mode overcomes the drawback of the in-plane switching mode, i.e., poor light usage efficiency. Further, with the FFS mode, since the pixel electrode and the opposite electrode driving liquid crystal are each formed by a transparent conducting film, the liquid crystal is driven over substantially the entire region on the pixel electrode and the opposite electrode to contribute to displaying images. Accordingly, the FFS mode can achieve higher brightness or reduced power consumption comparing favorably with the TN mode, while achieving wider viewing angles and higher definition. Accordingly, while securing the wide viewing angle characteristic obtained by the horizontal electric field system, higher brightness or reduced power consumption can be achieved.
Further, since the electrode structure is simpler as compared to that of the in-plane switching mode, it is also advantageous in achieving high definition. Accordingly, since higher definition and higher brightness or reduced power consumption are particularly demanded of a small- and medium-sized panels represented by smartphones or tablet terminals belonging to a promising field of products, it can be said that liquid crystal display apparatus of the FFS mode is becoming mainstream of the liquid crystal display apparatus of such a field.
The liquid crystal display apparatus of the FFS mode can be used effectively for displaying images in its entirety, except for the region where the wiring layer functioning as a light shield section is formed and the region where thin-film transistors (TFTs) functioning as switching elements are formed. Thus, it is expected that ideal higher brightness or reduced power consumption can be realized. However, practically, it is difficult to overlay or closely place the pixel electrode or the opposite electrode onto the wiring layer, under the constraints that the light blocking layer must be arranged to the upper portions of the pixel electrode and the opposite electrode, each made of a transparent conducting film, for the regions in the pixel part where unintended behavior of liquid crystal is observed, and that there is increased parasitic capacitance. Therefore, the substantial effective display region becomes narrow (or the proportion of the effective display region relative to the pixel part, i.e., the aperture ratio, is reduced), and ideal high brightness or reduced power consumption is yet to be realized.
In consideration of the problems described above, there are studies on techniques for further improving the aperture ratio of pixels with a liquid crystal display apparatus of the FFS mode. For example, Japanese Patent Application Laid-Open No. 2003-21845 discloses, as a conventional technique, the structure of a conventional liquid crystal display apparatus of the FFS mode in which the color shift phenomenon is prevented by arranging slits in a horizontally symmetric manner at the pixel electrode with reference to a storage capacitance bus line (common line). With this structure, in order to prevent undesirable light leakage invited by an electric field formed in the space between the edge portion of the pixel and opposite electrodes and the gate bus line (gate line) and the data bus line (source line) surrounding the electrodes, a black matrix (light shield film) on the upper substrate must be formed to be in the pixel part more than actually necessary. Thus, a reduction in the aperture ratio is invited.
In order to cope with the problem, the following technique is disclosed: the gate bus line is arranged at the position corresponding to the center portion of the pixel and opposite electrodes, such that the upper and lower edge portions of the pixel and opposite electrodes with reference to the gate bus line are overlaid with the storage capacitance bus line. Thus, light leakage at the edge portions of the pixel and opposite electrodes is prevented. Further, the black matrix extending to the outside of the lines can be dispensed with, in the vertical direction of the pixel and opposite electrodes. Still further, provision of the slits being arranged line-symmetrically with respect to the gate bus line makes it possible to achieve a balance between prevention of the color shift phenomenon and improvement in the pixel aperture ratio.
Further, Japanese Patent Application Laid-Open Nos. 2009-223245 and 2007-293154 disclose the technique in which slits are arranged line-symmetrically to the pixel electrode or the opposite electrode in order to prevent the color shift phenomenon, similarly to the disclosure of Japanese Patent Application Laid-Open No. 2003-21845. In such a structure, the edge portion of the pixel electrode and that of the opposite electrode are overlaid on the gate signal line (scanning line) and the drain signal line (signal line) that surround the electrodes. Thus, light leakage attributed to the electric field leaked from the signal lines is prevented, and the black matrix extending to the outside of the lines at four sides of the pixel and opposite electrodes can be dispensed with. Thus, the color shift phenomenon is prevented, and the pixel aperture ratio is further improved.
However, with the liquid crystal display panel disclosed in Japanese Patent Application Laid-Open No. 2003-21845, the light must still be blocked by the black matrix around the data bus line (source line) in the horizontal direction of the pixel and opposite electrodes (the direction perpendicular to the gate bus line), and hence an improvement in the aperture ratio is insufficient. Further, two common lines must be arranged in the vertical direction of the pixel and opposite electrodes, resulting in an increase in the number of the common line that is originally required one in number per row of pixels, or that can be eliminated by integration of the opposite electrode. Further, when the common line is formed with a light shield film such that it functions to block light, ultimately it results in an increase in the area of the light shield section.
Further, it is known that irregular alignment occurs around the end portions of the slits, reducing the displaying quality. When the displaying quality is given higher priority and therefore the end portions of the slits are also shielded from light by the black matrix, the aperture ratio is further reduced. In consideration of the foregoing, with the liquid crystal display panel disclosed in Japanese Patent Application Laid-Open No. 2003-21845, in terms of the entire display region, it is assumed that the technique does not contribute much toward an improvement in the aperture ratio, and that the displaying quality is poor.
Still further, with the liquid crystal display panel disclosed in Japanese Patent Application Laid-Open No. 2009-223245 also, a reduction in displaying quality due to occurrence of irregular alignment at the region around the end portions of the slits is concerned. When the end portions of the slits are also shielded from light by the black matrix giving priority to the displaying quality, a reduction in the aperture ratio is invited.
Still further, it is known that, at the boundary portion of two types of slits arranged in a line-symmetric manner also, irregular alignment occurs and a reduction in displaying quality is invited. As to each of the liquid crystal display panels respectively disclosed in Japanese Patent Application Laid-Open Nos. 2009-223245 and 2007-293154, a reduction in displaying quality may possibly occur at the boundary portion of the two types of slits, similarly to the phenomenon occurring at the region around the end portions of the slits.
When the boundary portion of the two types of slits is also shielded from light by the black matrix to cope with the problem, a further reduction in aperture ratio may possibly be invited.
Further, as can be seen in each of the liquid crystal display panels respectively disclosed in Japanese Patent Application Laid-Open Nos. 2009-223245 and 2007-293154, though the structure in which the pixel electrode and the opposite electrode are overlaid on the signal lines is effective in preventing electric field leakage and light leakage from the signal lines, noises from the signal lines may influence the pixel electrode. Thus, displaying quality may possibly be reduced. Further, when the parasitic capacitance between these signal lines and the pixel electrode becomes greater to some extent, troubles such as a reduction in speed of signals being written to the pixel electrode may possibly occur.
Further, as can be seen in the structure of the FFS mode liquid crystal display apparatus disclosed as the conventional technique in Japanese Patent Application Laid-Open No. 2003-21845, or the liquid crystal display panel disclosed in Japanese Patent Application Laid-Open No. 2010-217635, when the storage capacitance bus line (common line) is arranged so as to be overlaid with the boundary portion of the two types of slits arranged in a line-symmetric manner, irregular alignment occurring at the boundary portion of the two types of slits can be prevented from visually recognized. However, around the gate line, the light shield film is required, resulting in the reduced aperture ratio.
Further, the common line arranged at the center portion of the pixel electrode creates unevenness on the substrate surface, which in turn causes irregular alignment of liquid crystal to occur on the opposite sides of the common line. Therefore, a wide black matrix extending to the outside of the sides of the common line must be provided to the upper substrate. Accordingly, as a result, with the structure such as disclosed in Japanese Patent Application Laid-Open No. 2003-21845 as the conventional FFS mode liquid crystal display apparatus, or the structure of the liquid crystal display panel disclosed in Japanese Patent Application Laid-Open No. 2010-217635, the aperture ratio of the entire liquid crystal panel is greatly reduced.
As described above, with the FFS mode-liquid crystal display apparatus disclosed in any of Japanese Patent Application Laid-Open Nos. 2003-21845, 2009-223245, 2007-293154, and 2010-217635, it is difficult to achieve both an increase in aperture ratio and high displaying quality.